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Domain-Specific Multiprocessors: Systems, Architecture, Modeling, and Simulation (Signal processing)
 
 
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Domain-Specific Multiprocessors: Systems, Architecture, Modeling, and Simulation (Signal processing) (Hardcover)

by Shuvra S. Bhattacharyya (Editor), Ed F. Deprettere (Editor), Jürgen Teich (Editor) "Designing hardware accelerators for embedded systems presents many tradeoffs that are difficult to quantify without bit-accurate simulation and area and delay estimates of competing alternatives..." (more)
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Product Description

Product Description
Ranging from low-level application and architecture optimizations to high-level modeling and exploration concerns, this authoritative reference compiles essential research on various levels of abstraction appearing in embedded systems and software design. It promotes platform-based design for improved system implementation and modeling and enhanced performance and cost analyses. Domain-Specific Processors relies upon notions of concurrency and parallelism to satisfy performance and cost constraints resulting from increasingly complex applications and architectures and addresses concepts in specification, simulation, and verification in embedded systems and software design.



From the Back Cover
Ranging from low-level application and architecture optimizations to high-level modeling and exploration concerns, this authoritative reference compiles essential research on various levels of abstraction appearing in embedded systems and software design. It promotes platform-based design for improved system implementation and modeling and enhanced performance and cost analyses. Domain-Specific Processors relies upon notions of concurrency and parallelism to satisfy performance and cost constraints resulting from increasingly complex applications and architectures and addresses concepts in specification, simulation, and verification in embedded systems and software design.

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Designing hardware accelerators for embedded systems presents many tradeoffs that are difficult to quantify without bit-accurate simulation and area and delay estimates of competing alternatives. Read the first page
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