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Flip Chip Technologies (Electronic Packaging and Interconnection)
 
 

Flip Chip Technologies (Electronic Packaging and Interconnection) (Hardcover)

by John H. Lau (Author) "Figure 1.1 is a schematic representation of electronic package hierarchy ..." (more)
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Product Description

Product Description
The electronics industry is abuzz with talk of flip chip technologies (FCT), the group of revolutionary new techniques that enable chips to be connected to substrates without the use of wires. By literally placing the chip upside down and in direct contact with the substrate, FCT is a highly efficient-and increasingly popular-alternative to traditional bonding techniques. This is the first book to cover all of the major design, materials, and manufacturing issues related to FCT. Featuring authoritative contributions from the world's leading experts, this volume provides in depth discussion of all five contact points.

About the Author
John H. Lau received his Ph.D. degree in Theoretical and Applied Mechanics from the University of Illinois (1977), a M.A.Sc. degree in Structural Engineering from the University of British Columbia (1973), a second M.S. degree in Engineering Physics from the University of Wisconsin (1974), and a third M.S. degree in Management Science from Fairleigh Dickinson University (1981). He also has a B.E. degree in Civil Engineering from National Taiwan University (1970). John is an interconnection technology scientist at Agilent Technologies, Inc. His current interests cover a broad range of electronic and optoelectronic packaging and manufacturing technology. Prior to Agilent, he worked for Express Packaging Systems, Hewlett-Packard Company, Sandia National Laboratory, Bechtel Power Corporation, and Exxon Production and Research Company. With more than 30 years of R&D and manufacturing experience in the electronics, petroleum, nuclear, and defense industries, he has given over 200 workshops, authored and co-authored over 180 peer reviewed technical publications, and is the author and editor of 13 books: Solder Joint Reliability; Handbook of Tape Automated Bonding; Thermal Stress and Strain in Microelectronics Packaging; The Mechanics of Solder Alloy Interconnects; Handbook of Fine Pitch Surface Mount Technology; Chip On Board Technologies for Multichip Modules; Ball Grid Array Technology; Flip Chip Technologies; Solder Joint Reliability of BGA, CSP, Flip Chip, and Fine Pitch SMT Assemblies; Electronics Packaging: Design, Materials, Process, and Reliability; Chip Scale Package (CSP): Design, Materials, Process, Reliability, and Applications; Low Cost Flip Chip Technologies for DCA, WLCSP, and PBGA Assemblies, and Microvias for Low Cost, High Density Interconnects. John served as one of the associate editors of the IEEE Transactions on Components, Packaging, and Manufacturing Technology and ASME Transactions, Journal of Electronic Packaging. He also served as general chairman, program chairman, and session chairman, and invited speaker of several IEEE, ASME, ASM, MRS, IMAPS, SEMI, and SMI International conferences. He received a few awards from ASME and IEEE for best papers and outstanding technical achievements, and is an ASME Fellow and an IEEE Fellow. He is listed in American Men and Women of Science and Who's Who in America.

Inside This Book (Learn More)
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Figure 1.1 is a schematic representation of electronic package hierarchy. Read the first page
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Front Cover | Copyright | Table of Contents | Excerpt | Index | Back Cover
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