VERILOG HDL, Second Editionby Samir PalnitkarWith a Foreword by Prabhu Goel
Written forboth experienced and new users, this book gives you broad coverage of VerilogHDL. The book stresses the practical design and verification perspective ofVerilog rather than emphasizing only the language aspects. The informationpresented is fully compliant with the IEEE 1364-2001 Verilog HDL standard.
Among its many features, this edition—
Describes state-of-the-art verification methodologies
Provides full coverage of gate, dataflow (RTL), behavioral and switch modeling
Introduces you to the Programming Language Interface (PLI)
Describes logic synthesis methodologies
Explains timing and delay simulation
Discusses user-defined primitives
Offers many practical modeling tips
Includes over 300 illustrations, examples, and exercises, and a Verilog resource list.Learning objectives and summaries are provided for each chapter. About the CD-ROM
The CD-ROM contains a Verilog simulator with agraphical user interface and the source code for the examples in the book.
Whatpeople are saying about Verilog HDL—
“Mr.Palnitkar illustrates how and why Verilog HDL is used to develop today’smost complex digital designs. This book is valuable to both the novice and theexperienced Verilog user. I highly recommend it to anyone exploring Verilogbased design."
—RajeevMadhavan, Chairman and CEO, Magma Design Automation
“Thisbook is unique in its breadth of information on Verilog and Verilog-relatedtopics. It is fully compliant with the IEEE 1364-2001 standard, contains allthe information that you need on the basics, and devotes several chapters toadvanced topics such as verification, PLI, synthesis and modelingtechniques.”
—MichaelMcNamara, Chair, IEEE 1364-2001 Verilog Standards Organization
Thishas been my favorite Verilog book since I picked it up in college. It is theonly book that covers practical Verilog. A must have for beginners andexperts.”
—BerendOzceri, Design Engineer, Cisco Systems, Inc.
“Simple,logical and well-organized material with plenty of illustrations, makes this anideal textbook.”
—Arun K. Somani, Jerry R. Junkins Chair Professor,Department of Electrical and Computer Engineering, Iowa State University, Ames
Professional Technical Reference
Upper Saddle River, NJ 07458
About the Author
Samir Palnitkar is a recognized authority on Verilog HDL, modeling, verification, logic synthesis, and EDA-based methodologies in digital design. He has worked extensively with design and verification on various successful microprocessor, ASIC, and system projects. He was the lead developer of the Verilog framework for the shared memory, cache coherent, multiprocessor architecture, popularly known as the UltraSPARCTM Port Architecture, defined for Sun's next generation UltraSPARC-based desktop systems. Besides the UltraSPARC CPU, he has worked on a number of diverse design and verification projects at leading companies including Cisco, Philips, Mitsubishi, Motorola, National, Advanced Micro Devices, and Standard Microsystems.