- Paperback: 592 pages
- Publisher: Prentice Hall; 1 edition (29 Jun 1998)
- Language English
- ISBN-10: 0136392539
- ISBN-13: 978-0136392538
- Product Dimensions: 24.3 x 18.5 x 2.7 cm
- Average Customer Review: 4.0 out of 5 stars See all reviews (1 customer review)
- Amazon Bestsellers Rank: 2,479,777 in Books (See Top 100 in Books)
- See Complete Table of Contents
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More About the Author
Product Description
Product Description
For introductory-level courses in Verilog Hardware Description Language. Written by the co-developer of the Verilog Implicit To One hot (VITO) preprocessor, this text introduces the industry standard Verilog Hardware Description Language as a new way to explore enduring concepts in digital and computer design, such as pipelining. It shows how Verilog simulation is a tool for uncovering bugs prior to hardware fabrication, and how Verilog synthesis is a tool for automatically converting source code into hardware. Ideal for designers new to Verilog, it features a consistent design framework using ASM charts, and contains many realistic, practical examples.
From the Back Cover
63925-2
Verilog Digital Computer Design: Algorithms to Hardware
Shorten time to market with Verilog HDL
Real-world Verilog design, start-to-finish
The most productive way to design complex digital and computer systems is to understand them as algorithms and code them in implicit style Verilog, using Verilog's non-blocking assignment features. In this book, award-winning Verilog expert Mark Gord on Arnold shows how, introducing a top-down approach that leverages the ASM charts most digital designers are already familiar with. Throughout, you'll learn practical techniques that enable earlier debugging, automatic conversion of source code into hardware, and shorter time to market.
- Understand the fundamental goals, structure and behavior of Verilog.
- Discover how to use ASMs as the “master plan” for digital design.
- Walk through the three stages of Verilog design: behavioral, mixed and structural.
- Learn Verilog simulation techniques for Mealy machines and bottom-testing loops.
- Use Verilog gate level techniques to model propagation delay.
- Leverage special-purpose design techniques to build general-purpose processors.
Arnold demonstrates a powerful new approach that automatically synthesizes a one-hot design directly from implicit style Verilog. He also introduces the elegant ARM instruction set as a way of exploring RISC design with implicit Verilog and ASMs. From start to finish, Verilog Digital Computer Design: Algorithms to Hardware is more than a great guide to Verilog: it's a primer on the enduring concepts of computer design that will apply no matter which tools you choose.
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Customer Reviews
Most Helpful Customer Reviews
1 of 1 people found the following review helpful
Format:Paperback
This book presents a different viewpoint on computer architecture design by emphasising the algorithmic nature of digital computer design. The author has adopted a top-down approach which allows the designer to concentrate on developing the correct algorithm. The book is unique in showing the correspondence of ASM charts to Verilog by emphasising non-blocking assignments.
The book also contains a very useful and interesting chapter on logic synthesis and a good summary of combinational and sequential logic blocks. Other topics covered include: RISC procesors, pipelining and superscalar implementations.
Overall, a good book.
Most Helpful Customer Reviews on Amazon.com (beta)
Amazon.com:
6 reviews
1 of 1 people found the following review helpful
Gets you off to a running start
30 Dec 2003
Format:Paperback
I got this book as a quick tutorial on the Verilog language. After just a day or two with this book and a compiler to play with, I had the level of skill that I wanted. The Verilog language description is just one chapter in this book, though, and not even the longest one.
This is lots more than just a language book. It also shows a higher level of design than most students see in their first few logic courses. The example developed in the book's later sections works up to a supersclar ARM processor core! This book is not about hooking up a few gates and latches. It actually starts to address problems of practical size and complexity. Big problems really are different from small ones, and I was very happy to see techniques for the larger systems.
That said, beginning logic designers may find the book frustrating. It works at a high conceptual level and fast pace. The author assumes that the reader already has good command of the basics of boolean logic, synchronous design, and computer architecture.
Initially, I just wanted a competent language description. I got that, plus some worthwhile design technique. Best of all, I did not have to sit through yet another lesson in the baby steps of logic design.
5 of 7 people found the following review helpful
A good introductin to ASM and Implicit style Verilog
27 Mar 2000
Format:Paperback
ASM and Verilog are cool stuff for digital designers, however implicit style Verilog is unlikely to be widely adopted. Sythesis tools do not support this style.
enlightening!
7 Nov 2001
Format:Paperback
this book is an insightful and exciting introduction to hardware
design, especially to those like me with a software background.
the author illuminates the difference between hardware and
software specification, and demonstrates how his "implicit"
(RTL) approach works well for (synthesis of) pipelined CPU designs.
the only deficit is that some of the free tools listed in the
appendix are no longer available.
design, especially to those like me with a software background.
the author illuminates the difference between hardware and
software specification, and demonstrates how his "implicit"
(RTL) approach works well for (synthesis of) pipelined CPU designs.
the only deficit is that some of the free tools listed in the
appendix are no longer available.
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