System Performance Tuning [Paperback]

The second edition of System Performance Tuning offers advice on where to look for bottlenecks in applications--both local and networked--that run under Unix. It also offers advice on provisioning new systems, which is to say it offers advice on deciding how much computing power is enough for a new system to be implemented.

The easy way to solve a performance problem--and the one to which hardware manufacturers love to call attention--is to apply more horsepower to the application in question. It's safe to bet that a server upgrade will speed things up. True information technology professionals, however, won't take the easy way out when dealing with an increased workload for older systems. They'll do their best to wring top performance (with required reliability) from existing hardware, thus improving their organisations' return on capital investment and demonstrating their own engineering skills.

Emphasising Solaris 8 and, to a lesser extent, Linux, the new version of this book represents a significant revision (the first came out in 1990, and was obsolete). There's coverage of advances in hardware--multiple processors, RAID storage, faster and cheaper memory and networked devices--as well as consideration of changes in the demands placed on machines (after all, few people were concerned about Web server performance in 1990). Administrators will get plenty of value from the authors' discussion of what goes on during, for example, a series of large store-to-disk operations, and be better able to optimise their systems. --David Wall

Topics covered: how to get top performance from computer systems (those running Linux and especially Sun Solaris 8) without adding processor capacity, memory and other resources at potentially great expense. The authors explain the ways in which operating systems and applications use processors, memory, persistent storage and networks, and point out potential bottlenecks. They also show how to use tools--such as execution timers--that you can use to benchmark performance changes.

"A first-class resource....an invaluable and highly recommended tutorial and continuing reference work."

System Performance Tuning covers two distinct areas: performance tuning, or the art of increasing performance for a specific application, and capacity planning, or deciding what hardware best fulfills a given role. Underpinning both subjects is the science of computer architecture. This book focuses on the operating system, the underlying hardware, and their interactions. For system administrators who want a hands-on introduction to system performance, this is the book to recommend.

System Performance Tuning answers one of the most fundamental questions you can ask about your computer: How can I get it to do more work without buying more hardware? In the current economic downturn, performance tuning takes on a new importance. It allows system administrators to make the best use of existing systems and minimise the purchase of new equipment. Well-tuned systems save money and time that would otherwise be wasted dealing with slowdowns and errors. Performance tuning always involves compromises; unless system administrators know what the compromises are, they can't make intelligent decisions.

Tuning is an essential skill for system administrators who face the problem of adapting the speed of a computer system to the speed requirements imposed by the real world. It requires a detailed understanding of the inner workings of the computer and its architecture. System Performance Tuning covers two distinct areas: performance tuning, or the art of increasing performance for a specific application, and capacity planning, or deciding what hardware best fulfils a given role. Underpinning both subjects is the science of computer architecture. This book focuses on the operating system, the underlying hardware and their interactions. Topics covered include:

• real and perceived performance problems, introducing capacity planning and performance monitoring (highlighting their strengths and weaknesses)
• an integrated description of all the major tools at a system administrator's disposal for tracking down system performance problems
• background on modern memory handling techniques, including the memory-caching filesystem implementations in Solaris and AIX
• updated sections on memory conservation and computing memory requirements
• in-depth discussion of disk interfaces, bandwidth capacity considerations and RAID systems
• comprehensive discussion of NFS and greatly expanded discussion of networking
• workload management and code tuning
• special topics such as tuning Web servers for various types of content delivery and developments in cross-machine parallel computing

For system administrators who want a hands-on introduction to system performance, this is the book to recommend.

Chapter 4 - Memory

Ideally one would desire an indefinitely large memory capacity such that any particular. . . word would be immediately available. . . .

A. W. Burks, H. H. Goldstine, and J. von Neumann: Preliminary Discussion of the Logical Design of an Electronic Computing Instrument, 1946

In this chapter:
Implementations of Physical Memory
Virtual Memory Architecture
Paging and Swapping
Consumers of Memory
Tools for Memory Performance Analysis
Concluding Thoughts

Physical memory is a set of integrated circuits designed to store binary data. This storage has two characteristic properties: it is transient, as all stored information vanishes when electrical power is lost, and randomly accessible, meaning any bit can be accessed as fast as any other bit. In addition to physical memory, most systems implement virtual memory, which acts to manage physical memory and provide a simple interface to application developers. Virtual memory is consumed by the system kernel, filesystem caches, intimately shared memory, and processes.

Memory performance begins to affect overall system performance in two instances. The first instance occurs when the system is unable to retrieve and store data from physical memory fast enough, or when the system is forced to travel to main memory frequently. This sort of problem can be attacked by tuning the algorithm that is responsible or by buying a system with faster access to main memory. The second, and more likely, case is that the demand for physical memory by all currently running applications, including the kernel, exceeds the available amount. The system is then forced to begin paging, or writing unused pieces of memory to disk. If the low memory condition worsens, the memory consumed by entire processes will be written to disk, which is called swapping.[1] Memory conditions fall into four categories:

Sufficient memory is available, and the system performs optimally.

Memory is constrained (one likely culprit, especially on older Solaris systems, is the filesystem cache). Performance begins to suffer as the system attempts to scavenge memory that is not in active use.

The system is legitimately short of memory. Performance suffers, especially on interactive processes.

Memory is critically scarce. Swapping begins to take place. System performance takes a heavy hit, and interactive performance becomes abysmal.

In this chapter, I'll describe how memory is physically implemented, the mechanics of how the system manages memory, and how paging and swapping function at a system level. I'll give you some tools you can use to analyze your memory use, and explain how to work with swap space. Finally, I'll cover mechanisms to address some common memory performance problems.

Implementations of Physical Memory
Let's start by looking at how memory is physically implemented in modern systems. All modern, fast memory implementations are accomplished via semiconductors,[2] of which there are two major types: dynamic random access memory (DRAM) and static random access memory (SRAM). The difference between them is how each memory cell is designed. Dynamic cells are charge-based, where each bit is represented by a charge stored in a tiny capacitor. The charge leaks away in a short period of time, so the memory must be continually refreshed to prevent data loss. The act of reading a bit also serves to drain the capacitor, so it's not possible to read that bit again until it has been refreshed. Static cells, however, are based on gates, and each bit is stored in four or six connected transistors. SRAM memories retain data as long as they have power; refreshing is not required. In general, DRAM is substantially cheaper and offers the highest densities of cells per chip; it is smaller, less!
power-intensive, and runs cooler. However, SRAM is as much as an order of magnitude faster, and therefore is used in high-performance environments. Interestingly, the Cray-1S supercomputer had a main memory constructed entirely from SRAM. The heat generated by the memory subsystem was the primary reason that system was liquid-cooled.

There are two primary performance specifications for memory. The first represents the amount of time required to read or write a given location in memory, and is called the memory access time. The second, the memory cycle time, describes how frequently you can repeat a memory reference. They sound identical, but they are often quite different due to phenomena such as the need to refresh DRAM cells.

There is quite a gap between the speed of memory and the speed of microprocessors. In the early 1980s, the access time of commonly available DRAM was about 200 ns, which was shorter than the clock cycle of the commonly used 4.77 MHz (210 ns) microprocessors of the day. Fastforwarding two decades, the clock cycle time of the average home microprocessor is down to about a nanosecond (1 GHz), but memory access times are hovering around 50 ns.

Many different kinds of memory modules have been developed to improve system performance. I'll present a few here.

The oldest option currently in use is fast-page mode (FPM) memory. It implements the ability to read a full page (4 KB or 8 KB) of data during a single memory access cycle.

A refinement of this technique goes into extended data output (EDO) memory. The refinements are largely based on electrical modifications.

A more revolutionary change was implemented in synchronous DRAM (SDRAM) memory, which uses a clock to synchronize the input and output of signals. This clock is coordinated with the CPU clock, so the timings of all the components are synchronized. SDRAM also implements two memory banks on each module, which essentially doubles the memory throughput; it also allows multiple memory requests to be pending at once. A variation on SDRAM, called double-data rate SDRAM (DDR SDRAM) is able to read data on both the rising and falling edges of the clock, which doubles the data rate of the memory chip.