This book is a great reference as far as describing the VHDL sintax goes. However, the "design" in the title didn't match my expectations. There is little focus on actual design, synthesis and implementation, the most part of the examples are only suitable for simulation, not implementation in reconfigurable systems.
For instance, the book does not explain how signals can infer laches or flip-flops or even simple interconnects, depending on the constructs where they appear. This a very basic subject that shouldn't go unmentioned on a Designer's book... Also, there is way too much topics about non synthesisable data types and operations, with only one meager chapter about synthesis near the end.
The book serves well as a reference for the VHDL syntax, albeit the language and syntax diagrams aren't the best choice for clearness, but it isn't suited for VHDL based design at all.
There is an awfull lot of better alternatives out there.