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Computer Organization and Design: The Hardware/Software Interface Hardcover – 8 Dec 1997


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Product details

  • Hardcover: 1000 pages
  • Publisher: Morgan Kaufmann Publishers In; 2nd Revised edition edition (8 Dec 1997)
  • Language: English
  • ISBN-10: 1558604286
  • ISBN-13: 978-1558604285
  • Product Dimensions: 24.3 x 19.5 x 4.9 cm
  • Average Customer Review: 4.4 out of 5 stars  See all reviews (8 customer reviews)
  • Amazon Bestsellers Rank: 554,816 in Books (See Top 100 in Books)
  • See Complete Table of Contents

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Review

"o:This book trains the student with the concepts needed to lay a solid foundation for joining this exciting field. More importantly, this book provides a framework for thinking about computer organization and design that will enable the reader to continue the lifetime of learning necessary for staying at the forefront of this competitive discipline. —John Crawford, Intel Fellow, Director of Microprocessor Architecture, Intel

About the Author

David A. Patterson was the first in his family to graduate from college (1969 A.B UCLA), and he enjoyed it so much that he didn't stop until a PhD, (1976 UCLA). After 4 years developing a wafer-scale computer at Hughes Aircraft, he joined U.C. Berkeley in 1977. He spent 1979 at DEC working on the VAX minicomputer. He and colleagues later developed the Reduced Instruction Set Computer (RISC). By joining forces with IBM's 801 and Stanford's MIPS projects, RISC became widespread. In 1984 Sun Microsystems recruited him to start the SPARC architecture. In 1987, Patterson and colleagues wondered if tried building dependable storage systems from the new PC disks. This led to the popular Redundant Array of Inexpensive Disks (RAID). He spent 1989 working on the CM-5 supercomputer. Patterson and colleagues later tried building a supercomputer using standard desktop computers and switches. The resulting Network of Workstations (NOW) project led to cluster technology used by many startups. He is now working on the Recovery Oriented Computing (ROC) project. In the past, he served as Chair of Berkeley's CS Division, Chair and CRA. He is currently serving on the IT advisory committee to the U.S. President and has just been elected President of the ACM. All this resulted in 150 papers, 5 books, and the following honors, some shared with friends: election to the National Academy of Engineering; from the University of California: Outstanding Alumnus Award (UCLA Computer Science Department), McEntyre Award for Excellence in Teaching (Berkeley Computer Science), Distinguished Teaching Award (Berkeley); from ACM: fellow, SIGMOD Test of Time Award, Karlstrom Outstanding Educator Award; from IEEE: fellow, Johnson Information Storage Award, Undergraduate Teaching Award, Mulligan Education Medal, and von Neumann Medal. John L. Hennessy is the president of Stanford University, where he has been a member of the faculty since 1977 in the departments of electrical engineering and computer science. Hennessy is a fellow of the IEEE and the ACM, a member of the National Academy of Engineering, the National Academy of Science, the American Academy of Arts and Sciences, and the Spanish Royal Academy of Engineering. He received the 2001 Eckert-Mauchly Award for his contributions to RISC technology, the 2001 Seymour Cray Computer Engineering Award, and shared the John von Neumann award in 2000 with David Patterson. After completing the project in 1984, he took a one-year leave from the university to co-found MIPS Computer Systems, which developed one of the first commercial RISC microprocessors. After being acquired by Silicon Graphics in 1991, MIPS Technologies became an independent company in 1998, focusing on microprocessors for the embedded marketplace. As of 2004, over 300 million MIPS microprocessors have been shipped in devices ranging from video games and palmtop computers to laser printers and network switches. Hennessy's more recent research at Stanford focuses on the area of designing and exploiting multiprocessors. He helped lead the design of the DASH multiprocessor architecture, the first distributed shared-memory multiprocessors supporting cache coherency, and the basis for several commercial multiprocessor designs, including the Silicon Graphics Origin multiprocessors. Since becoming president of Stanford, revising and updating this text and the more advanced Computer Architecture: A Quantitative Approach has become a primary form of recreation and relaxation.

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Customer Reviews

4.4 out of 5 stars
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Most Helpful Customer Reviews

9 of 9 people found the following review helpful By G. Avvinti on 27 Feb 2003
Format: Hardcover
This book is quite a strange case. For sure, it is the most widely used around the world for intro courses on Computer Architecturs (CAs). Could it be because Hennessy and Patterson are, at present and since a long time, two of the most prominent researchers in the field, Hennessy being now also President of Stanford University, Patterson a professor at Berkeley. But it would be too reductive to limit the view to this only. So we should move inside the book and try to understand the real (or other) reasons.
As an introductory text on CA, the approach is different than the somewhat classical one.
Those who'd expect a few introductory chapters on logic design (as, e.g., Mano & Kime's chapters or Murdocca's long appendixes) will find instead a short appendix that describes basic components (gates, registers, clocks and so on) at a high level (never mention digital abstracion & co.).
The path then is not a survey of general concepts & principles of CA with eventually some real examples as application. Instead, the process is a strictly step-by-step constructive one: they build from scratch a new system funding the design with plenty of considerations and tips, even with warnings on most common "fallacies and pitfalls". All this done through a very straightforward and clear language and with lots of figures, well paced and presented. As a result, coping with the topics is pretty an easy task, and the most likely result is a thourough understanding of what they present.
So what they present ? Substantially, the MIPS, a well known (thanks to this book and their authors too, of course) and widely sold (thanks to its true qualities) RISC processor.
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4 of 4 people found the following review helpful By A Customer on 24 Aug 1998
Format: Hardcover
My lecturer told the students it was the best book in the world. I don't exactly agree with him, but I must say that it is one of the best book in its class. The good points are pretty much sumed up by Amazon's review.
I am currently using it as a text, and I have the same problem as Craig because there is no way I can check if my answers are right on my own. END
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4 of 4 people found the following review helpful By A Customer on 29 Aug 1998
Format: Hardcover
overall, a very clear and understandable book. examples and motivation was very well presented. some of the material on system performance (first chapter) could be skimmed/trimmed to obtain the vital information quickly. i would also wager some of the beefier chapters could be trimmed without losing clarity (some passages seemed redundent)
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1 of 1 people found the following review helpful By A Customer on 15 Nov 1997
Format: Hardcover
This book kicks butt. It's got everything most programmers could
possibly want to know about how the machine underneath works, and more.
It covers circuit logic, hardware arithmetic, how a processor works . . .
It answered all of my "I wonder how that happens in the machine" questions.
However, I doubt you'd really want to read it unless you're in a
computer architecture class. I don't even mind the ridiculous price; it's
one of the few textbooks I feel is worth it.
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